place and route meaning in Chinese
布局及路由
Examples
- Vdsm ulsi place and route optimization research
布局布线优化设计研究 - This paper is clued by the design and implementation of fpga and asic , and it expatiates on the subject of pci bus target controller , which involves all processes of design , simulation , synthesis and test , placing and routing
以fpga和asic的设计和实现为线索，阐述了pci总线目标设备控制器设计、仿真、综合验证及布局布线的各个步骤，以及基于asic技术的高层次设计方法。 - Soc integration is based on the pre - designed ips . it is implemented by synthesis and auto place and route . in this process , however , hard ips must provide enough and accurate information and models in addition to their design data
第五章给出了基于ip的soc系统集成，系统集成以预先设计好的ip为起点，对于不同形式的ip除了提供其设计数据之外，还在各个抽象层次的设计基础上提交了相应的信息。 - Furthermore , it discusses how to improve the reliability and consistency of the system and how to design the constraint files of place and route . at the present , we have tested this responder system roundly . this system is reliable steady and highly accurate and meet our expectant aim
目前,本论文介绍的单脉冲二次监视雷达应答信号处理器已经完成全方面的测试,系统具有较高的可靠性、稳定性和系统精度,满足设计要求,达到了预期的目的,可以应用于单脉冲二次雷达接收机上。 - The design of this chip sticks to the general methodology of hdl design . lt is entered in hdl format with innoveda ' s visual hdl and simulated with modelsim simulator , after synthesized with fpga compiler ii , the edif is entered in quartus ii , which is supplied by altera corporation to place and route . the sdo file produced by quartus ii is backannotated to the netlists and timing - simulation is been done . the success of this cryptogrammic chip also shows the effectiveness and advantage of the methodology of high level design with hdl
在innoveda的visualhdl设计平台上用hdl语言完成了设计输入，使用modelsim仿真器完成了功能仿真，使用synopsys的fpgacompiler进行了基于alterafpga库的网表综合，最后将edif网表输入altera的布局布线工具quartus中进行了布局布线，将生成的sdo文件反标到modelsim仿真器中进行了时序仿真，该设计的成功，再一次表明了hdl设计方法的正确性和有效性。